| 摘要 |
<p>PROBLEM TO BE SOLVED: To suppress the rise of voltage applied to each thyristor constituting a cyclo converter even if the temporary voltage rise caused by load property occurs. SOLUTION: The input side of a bridge type of full wave rectification circuit 20 consisting of four pieces of diodes is connected between single-phase outputs, and a capacitor accumulating circuit consisting of a capacitor 21 and a resistor 22 is connected to the output side. There is a case where the crest value of this single-phase output goes up suddenly for a while in a transition state such that load connected to the single-phase output is turned on or turned off or the wave distortion is generated when reactor load is connected as load. In this case, the amount of rise of the crest value of single-phase output is absorbed by the capacitor 21 through the rectification bridge circuit 20.</p> |
