发明名称 |
Input/output protection circuit having an SOI structure |
摘要 |
An I/O protection circuit includes a P-channel MOS transistor connected between an input terminal and a power supply line, and an N-channel MOS transistor connected between the input terminal and a ground line. Gate electrodes of both the transistors are floated. The transistors may be replaced with gate diodes. Further, gate electrodes may be formed from the same layer as a gate electrode provided for field shielding.
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申请公布号 |
US6118154(A) |
申请公布日期 |
2000.09.12 |
申请号 |
US19970947345 |
申请日期 |
1997.10.08 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
YAMAGUCHI, YASUO;SATO, HIROTOSHI;INOUE, YASUO;IWAMATSU, TOSHIAKI |
分类号 |
H01L27/04;H01L21/822;H01L27/02;H01L29/786;(IPC1-7):H01L23/60 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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