| 摘要 |
PROBLEM TO BE SOLVED: To prevent occurrence of sleep during fluctuations of an input clock frequency and to minimize a rapid fluctuation in an output phase. SOLUTION: The frame synchronization circuit is provided with a phase comparator 11, a voltage controlled oscillator VCO 12, a frequency divider 13, an output frame generating counter 14, and a frame phase difference control circuit 15 placed between the phase comparator 11 and the VCO 12. The frame phase difference control circuit 15 sets phase differences between an input frame and an output frame for plural sections and gives a VCO control voltage different according to the phase difference to the VCO 12. |
