| 摘要 |
PURPOSE: A semiconductor memory apparatus having a rapid input/output line pre-charge scheme and an input/output line pre-charge method are provided to precharge input/output lines rapidly in the write interrupt of a normal mode and a page mode. CONSTITUTION: A DRAM device(200) comprises an array(210) of memory cells arranged in the domains which wordlines(WL0-WLn) and bitlines(BL0-BLn) are crossed respectively. A first input/output line driver circuit(230) connected with a first input/output line pair(IOi,IOiB) arranged on the left side of the array(210) drives the first input/output line pair(IOi,IOiB) using data to be filled out in response to a signal(CA8B) provided from an address buffer circuit(260). The first input/output line pair(IOi,IOiB) is precharged through a first precharge circuit(240) controlled by a first precharge signal(PIOP_8B) provided from a precharge controller(330). A second input/output line driver circuit(230) connected with a second input/output line pair(IOj,IOjB) arranged on the right side of the array(210) drives the second input/output line pair(IOj,IOjB) using data to be filled out in response to a signal(CA8). The second input/output line pair(IOj,IOjB) is precharged through a second precharge circuit(240) controlled by a second precharge signal(PIOP_8) provided from the precharge controller(330).
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