ASYNCHRONOUS SIGNAL MULTI TRANSMISSION APPARATUS

摘要

PURPOSE: An asynchronous signal multi transmission apparatus is provided to multiply and transmit signals through a single transmission route when transmitting asynchronous signals, to reversely multiply the multiplied signals received from the destination and connect the signals to the original destination, and to divide and display the reversely multiplied signals received by a personal computer, if necessary, through windows according to the respective routes, thereby maximizing efficiency of signal circuits and communication equipment operation. CONSTITUTION: An asynchronous signal multi transmission apparatus comprises: a power supply section (21) for supplying electric power to respective circuits; a memory section (26) for storing operation programs; a central processing device (27) for controlling operation of the respective circuits by the stored programs; a series communication control section (31) for, controlled by the stored programs of the central processing device, jointly having external asynchronous signals and information; a real-time clock section (22) for jointly having the data with the central processing device and generating a real-time; a crystal liquid display section (23) for jointly having the data with the central processing device and displaying operation and time of the asynchronous signal multi transmission device; a periphery signal control section (32) for, controlled by the central processing device, controlling signals of periphery elements; a modem matching section (29) for jointly having the data with the central processing device and transmitting the multiplied signals to a long distance; a RS-232 signal converting section (30) for jointly having information with the series communication control section and according standards of the external device and signals; an initialized signal generating section (25) for transmitting signals to the central processing device and peripheral elements and initializing the same; and a clock generation section (24) for generating clocks necessary for the central processing device and the peripheral elements.