发明名称 MICROCOMPUTER AND MICROCOMPUTER SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To make it possible to process both data transfer control on an external bus of a microcomputer and CPU operation such as an access to an internal bus by a built-in CPU in parallel while minimizing the increment of the physical/ logical scale. SOLUTION: A microcomputer 1 including a CPU 2 in its inside is provided with a 1st data transfer device 4 for controlling direct memory access transfer on external buses EDBUSA, EABUS of the microcomputer 1 and parallel execution of an internal bus access by the CPU 2 or the like and external data transfer control by the device 4 is made possible. An internal bus access by the CPU 2 and an external access by the device 4 are collectively controlled by an external bus controller 121. Consequently, the transfer of data on the external bus by the device 4 and instruction execution or the like using the internal bus by the CPU 2 can be executed in parallel.</p>
申请公布号 JP2000235560(A) 申请公布日期 2000.08.29
申请号 JP19990036949 申请日期 1999.02.16
申请人 HITACHI LTD 发明人 MITSUISHI NAOMIKI
分类号 G06F13/36;G06F15/78;(IPC1-7):G06F15/78 主分类号 G06F13/36
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