发明名称 |
METHOD FOR REDUCING BANDWIDTH AND FRAME BUFFER SIZE IN DIGITAL PULSE-WIDTH-MODULATED DISPLAY SYSTEM |
摘要 |
PURPOSE: A method for reducing bandwidth and frame buffer size in a digital pulse-width-modulated display system is provided to minimize the total buffer capacity requirements by reducing the average delay of data before it is displayed. CONSTITUTION: A controller organized the data in a memory into a plurality of buffers, each buffer having only bits of like weight. The data is collected as groups within the buffers. The data is then coupled to a display device as the groups of like-weighted bits after a predetermined fraction of a frame time for producing the desired PWM signal. Each bit of the incoming video data is stored for a fraction of a frame time.
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申请公布号 |
KR20000053089(A) |
申请公布日期 |
2000.08.25 |
申请号 |
KR19997004013 |
申请日期 |
1999.05.06 |
申请人 |
SILICON LIGHT MACHINES |
发明人 |
ARAS RICHARD JOHN EDWARD;ALIOSHIN PAUL A. |
分类号 |
G09G3/20;G09G3/34;G09G5/00;G09G5/397;G09G5/399;H04N7/26;(IPC1-7):G09G3/20 |
主分类号 |
G09G3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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