发明名称 MULTI-CHIP CHIP SCALE PACKAGE
摘要 PURPOSE: A multi-chip chip scale package is provided which improves the operation of a chip by shortening signal transmission path. CONSTITUTION: Two same chips of different sizes are placed in a film carrier(50,52,54,56). The chips are arranged in each side of the film carrier to face each other by using a flip chip technology. A bump(72) is formed on each chip and is connected to the film carrier electrically. And, an insulation material is filled between the chips and one side of each chip is revealed. A conductive wire(62) of the film carrier is connected directly to the chip without passing through other carrier. The insulation material is filled to cover a part of the insulation film, and the insulation film includes a number of leading holes(86).
申请公布号 KR20000052094(A) 申请公布日期 2000.08.16
申请号 KR19990002947 申请日期 1999.01.29
申请人 UNITED MICROELECTRONICS CORP. 发明人 SCHUANMIN CHI;RINCHAENG TAE
分类号 H01L23/52;(IPC1-7):H01L23/52 主分类号 H01L23/52
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