发明名称 Semiconductor storage device having spare and dummy word lines
摘要 A memory cell array includes a plurality of memory cells that are arranged in the row and column directions. Power supply lines and grounding lines are arranged on the memory cell array so as to extend in the column direction. The grounding lines are so arrayed that a plurality of power supply lines are interposed therebetween or, conversely, the power supply lines are so arranged that a plurality of grounding lines are interposed therebetween. By connecting together adjacent power supply lines (or grounding lines) of the same potential on a column decoder to form a single power line, the number of power supply lines extending in the column direction on the column decoder can be reduced, whereby an effective element forming region of the column decoder can be expanded.
申请公布号 US6104630(A) 申请公布日期 2000.08.15
申请号 US19980197764 申请日期 1998.11.23
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 HIDAKA, HIDETO
分类号 G11C11/401;G11C5/14;G11C11/407;G11C11/409;H01L21/8242;H01L27/108;(IPC1-7):G11C5/06 主分类号 G11C11/401
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