发明名称 MEMORY CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To match a transmission destination address with a boundary of a system bus by providing an address conversion circuit and an address restoring circuit in the DMA control part and memory controller of a computer system using a general purpose bus such as a PCI bus. SOLUTION: A memory control unit which performs data transfer between an I/O and a memory through a bus by boundaries has a buffering device which temporarily buffers transferred data and transfers the data together at a time when reaching a boundary part of a memory 21, an address conversion circuit 15 which converts a transferring destination address in the memory 21 and sends it to the bus and an address restoring circuit 19 which restores the address converted by the address conversion circuit 15. When the data are sent from the buffering device to the bus, it is possible to transfer data by using up all the boundaries by matching an transferring destination address with an boundary of the bus.
申请公布号 JP2000227898(A) 申请公布日期 2000.08.15
申请号 JP19990029979 申请日期 1999.02.08
申请人 NEC ENG LTD 发明人 TAKEUCHI KOJI
分类号 G06F12/02;G06F12/04;G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F12/02
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