发明名称 |
Method of forming deep trench capacitors |
摘要 |
A vertical trench in a silicon wafer for use in forming the storage capacitor of a DRAM is etched by reactive ion etching in a manner to have a profile that has multiple waists. This profile is obtained by varying the rate of flow of coolant in the base member on which the silicon wafer is supported during the reactive ion etching to vary the temperature of the silicon wafer during the etching. Alternatively, the multiple waists are achieved by either by varying the ratio of the different gases in the etching chamber or the total gas pressure in the chamber.
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申请公布号 |
US6103585(A) |
申请公布日期 |
2000.08.15 |
申请号 |
US19980093801 |
申请日期 |
1998.06.09 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
MICHAELIS, ALEXANDER;RANADE, RAJIV;FLIETNER, BERTRAND |
分类号 |
H01L21/302;H01L21/02;H01L21/3065;H01L21/334;H01L21/822;H01L21/8242;H01L27/04;H01L27/108;(IPC1-7):H01L21/20 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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