发明名称 TRANSMITTER AND MONITOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce deterioration in the performance of an MSP software by limiting interrupt to the MSP software to a required minimum degree of interrupt. SOLUTION: Automatic protection switching APS bytes are divided into low-order 3 bits (x) in k 2 bytes and 13 bits (x) which are other than these and a difference from a bit stream is detected in the unit of transmission frames for them. In this case, a one-frame register 606 and a comparator circuit B 603 are used for checking the bit stream (y) and when an MS-RDI alarm is detected, even when a difference is found from the bit stream, the result of detection is always masked. Then the outputs of comparator circuits A 602, B 603 are ORed, the result is latched by a flip-flop 605 and its output is used for an automatic protection switching(APS) byte change point detection signal (f). If an SF condition alarm is detected in this case, an SF condition alarm detection signal (e) denoting it is used so as to reset the flip-flop 605.
申请公布号 JP2000224130(A) 申请公布日期 2000.08.11
申请号 JP19990021302 申请日期 1999.01.29
申请人 TOSHIBA CORP 发明人 DOBASHI KYOSUKE
分类号 H04L1/22;H04J3/00;H04L29/14;(IPC1-7):H04J3/00 主分类号 H04L1/22
代理机构 代理人
主权项
地址