发明名称 Sampling clock signal recovery device and method in receiving terminal of DMT system
摘要 A sampling clock signal recovery device and method for providing the sampling clock signal recovery device, in a receiving terminal of a discrete multitone (DMT) system, for accurately recovering a sampling clock signal by reducing sampling-induced jitter noise, i.e., by removing additive white Gaussian noise (AWGN) from the receiving terminal of the DMT system, and stably recovering a sampling clock signal. The above is accomplished by determining whether the phase error is smaller than a predetermined threshold value. If the phase error is equal to, or greater than the predetermined threshold value, then the instant invention corrects the sampling clock signal by the phase error. However, if the phase error is less than the predetermined threshold value, then the instant invention calculates an average value of some or all of decision error values, and corrects the sampling clock signal by the average value. Thus, a sampling clock signal is more accurately recovered.
申请公布号 US6101230(A) 申请公布日期 2000.08.08
申请号 US19970815074 申请日期 1997.03.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHUN, YOU-SIK;CHO, SEONG-BAE;KIM, DONG-GYU
分类号 H04L7/00;H04L7/02;H04L7/033;H04L7/10;H04L27/26;(IPC1-7):H04C7/00 主分类号 H04L7/00
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