发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To prevent over-erasing by allowing data write to unused cells during the test in view of realizing low current dissipation by inhibiting data write to unused cells during the normal operation. SOLUTION: During the test, even when the defective cell exists or not, output signals of the write data control circuits 16, 17 become '1' during data writing before erasing and the data write operation to the main cells and redundant cells are also allowed. During the ordinary operation, in the write operation before erasing when defective cell does not exist, an output signal of the write data control circuit 17 becomes '0' and data writing operation to the redundant cell is inhibited. In the write operation before easing when a defective cell exists, an output signal of the write data control circuit 16 becomes '0' and write operation to the cell of defective column is inhibited.</p>
申请公布号 JP2000215699(A) 申请公布日期 2000.08.04
申请号 JP19990011729 申请日期 1999.01.20
申请人 TOSHIBA CORP 发明人 OKAWA TORU
分类号 G11C16/06;G11C29/00;G11C29/06;(IPC1-7):G11C29/00 主分类号 G11C16/06
代理机构 代理人
主权项
地址