发明名称 EXPOSING METHOD FOR PLATED RESIST AND ALIGNER
摘要 PROBLEM TO BE SOLVED: To propose an exposing method for a printed wiring board and an aligner therefor to obtain a printed wiring board excellent in connectability and reliability and having no positional deviation in the case of forming a conductor circuit through a via hole between layers. SOLUTION: This aligner is equipped with a substrate move control part 21 for performing the alignment of a substrate, a mask move control part 18 for alignment of a mask, an image processing part 16 processing an image picked up by a camera 10, and a controller 19 giving a position correcting command to the control parts 18 and 21 based on the image processed by the processing part 16. Since light is radiated to a positioning mark where the conductor circuit is not disposed at a lower part, the difference of the contrast of reflected light is made large and the positioning mark is clearly image-picked up by the camera 10.
申请公布号 JP2000214600(A) 申请公布日期 2000.08.04
申请号 JP19990017335 申请日期 1999.01.26
申请人 IBIDEN CO LTD 发明人 IWAI KAZUO;MATSUBARA SHIGEJI;HAYASHI TAKANOBU;KIBE YOSHIHARU
分类号 H05K3/00;G03F9/00;(IPC1-7):G03F9/00 主分类号 H05K3/00
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