发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory having a improved sense margin by reducing the fluctuation of each signal even in a memory cell positioned at a remote edge. SOLUTION: The 1/2 level of a power supply potential is used for cell counter electrode level setting and digit line pre-charge in this semiconductor memory. A shorting circuit 103 for short-circuiting a cell counter electrode level HVCP1 and a pre-charge level (reference level) HVCD are arranged in a plurality of places in the neighborhood of a sense amplifier area. Thus, a sense margin can be improved by reducing the fluctuation of each signal due to coupling or the like due to concentrated refresh just after power-on even in a memory cell positioned at the edge far from the HVCC level generating circuit 101.
申请公布号 JP2000215660(A) 申请公布日期 2000.08.04
申请号 JP19990016032 申请日期 1999.01.25
申请人 NEC CORP 发明人 TSUCHIYA TOMOHIRO
分类号 G11C11/404;G11C7/12;G11C7/20;G11C11/24;G11C11/401;G11C11/406;G11C11/4072;G11C11/4074;G11C11/409;G11C11/4091;H01L21/8242;H01L27/108 主分类号 G11C11/404
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