发明名称 Algorithmic analog-to-digital converter with reduced differential non-linearity and method
摘要 An analog to digital converter section for use in an analog to digital converter which includes a converter stage which produces a digital and an residue output. The residue output is applied to an over-range stage which produces a second residue output equal to the first residue output reduced in magnitude by the magnitude of a reference voltage. The over-range stage is capable of operating with a relatively high feedback factor to increase operating speed and with commutated feedback-capacitor switching to reduce differential non-linearity errors.
申请公布号 US6097326(A) 申请公布日期 2000.08.01
申请号 US19980084543 申请日期 1998.05.26
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 OPRIS, ION E.;CHIN, SING W.;WONG, BILL C.;SAKURAI, SATOSHI
分类号 H03M1/06;H03M1/44;(IPC1-7):H03M1/38 主分类号 H03M1/06
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