发明名称 |
Pull through FIFO memory device |
摘要 |
A pull through FIFO memory structure consisting solely of latches and logic circuits wherein the FIFO structure includes an empty/full bit for determining whether each cell in the FIFO structure includes FIFO data. If a cell is identified as not containing FIFO data, then each previous cell's FIFO data will be advanced during a clock signal.
|
申请公布号 |
US6097655(A) |
申请公布日期 |
2000.08.01 |
申请号 |
US19980055002 |
申请日期 |
1998.04.03 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
KESSLER, STEPHEN L. |
分类号 |
G06F5/08;(IPC1-7):G11C16/04 |
主分类号 |
G06F5/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|