| 摘要 |
PROBLEM TO BE SOLVED: To shorten the memory cycle time in a burst mode in a synchronous DRAM(dynamic random access memory). SOLUTION: A counter unit 100 performs count operation for generating an address for burst operation by setting an initial address in a burst mode and synchronizing with a clock. A column address generator 101 generates an continuous column address for burst operation by a count value from the counter unit 100. A counter control circuit 103 controls operation of the counter unit 100. A controller 105 outputs a signal for stopping counter operation in the counter unit 100 to the counter control circuit 103 responding to an external control signal DSF1 inputted through an external control signal line for stop only.
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