DRAM REFRESH MONITORING AND CYCLE ACCURATE DISTRIBUTED BUS ARBITRATION IN A MULTI-PROCESSING ENVIRONMENT

摘要

A multiprocessor system includes a distributed bus arbitration system in which bus arbitration takes place simultaneously on each of the multiple processors connected to the bus. Each processor has a local arbitrator of common configuration with the other local arbitrators and a dedicated request line. Each local arbitrator is connected to each dedicated request line to monitor signals on lines indicative of requests for mastership of the bus by the processors. The multiprocessor system also includes a distributed DRAM refresh system in which each processor has a local DRAM refresh controller of common configuration with the other DRAM refresh controllers. Thus, as mastership of the bus passes from one processor to the other, the new bus master's local DRAM refresh controller can continue the DRAM refresh process without requiring information to be transferred from the old bus master to the new bus master, and without duplicating DRAM refresh operations.