发明名称 Interface circuit capable of preventing reflected waves and glitches
摘要 An interface circuit is constructed such that, when a switching in a potential level on a bus connected to semiconductor devices and transmitting data and control information is detected, the bus is controlled to be connected to one of predetermined potentials for a predetermined period of time, in correspondence with a direction in which the switching has occurred.
申请公布号 US6094091(A) 申请公布日期 2000.07.25
申请号 US19960746648 申请日期 1996.11.13
申请人 FUJITSU LIMITED 发明人 OKAJIMA, YOSHINORI
分类号 G06F3/00;G05F1/10;G05F3/02;G06F13/00;H04L29/10;(IPC1-7):G05F1/10 主分类号 G06F3/00
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