发明名称 METHOD FOR FORMING ANALOG CAPACITOR OF MML SEMICONDUCTOR DEVICE
摘要 PURPOSE: An analog capacitor forming method of a MML(merged memory and logic) semiconductor device is to improve a characteristic, a reliability, and a productivity of a semiconductor device by increasing a capacitance. CONSTITUTION: A MML semiconductor device is divided into a cell region, an analog capacitor forming region, and a logic region. A semiconductor substrate(41) is provided with a device isolation film(43). A gate oxide film(45), a first polycrystalline silicon film(47), a tungsten silicide(49), a capping polycrystalline silicon film(51), and a mask insulating film(53) are formed in this sequence on the semiconductor substrate. A first oxide film(55) is then deposited on an upper portion of the whole surface. The first oxide film has a spacer by anisotropic etching the first oxide film of the analog capacitor forming region and the logic region. A photosensitive film pattern is then formed to expose a source/drain contact region of the analog capacitor forming region and the logic region. After removing the photosensitive film pattern, a second oxide film(57) is formed on an upper portion of the whole surface at predetermined thickness. Finally, a second polycrystalline silicon film(61) is deposited on a region including the source/drain contact region of the cell region.
申请公布号 KR20000045918(A) 申请公布日期 2000.07.25
申请号 KR19980062541 申请日期 1998.12.30
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 CHO, NAM HONG
分类号 H01L27/108;(IPC1-7):H01L27/108 主分类号 H01L27/108
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