发明名称 TEST DEVICE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>A lead frame or PCB (e.g. a ball grid array) has an array of IC package mounts (8a-c). At the head of each column an inclined line of reject markers (10a-c) is provided, one for each IC package mount in the column. Each reject marker (10) comprises an island joined to the remainder of the substrate by short tie-bars. The islands are broken out to indicate the corresponding IC mount or an IC package mounted there is a reject.</p>
申请公布号 WO2000042649(A1) 申请公布日期 2000.07.20
申请号 SG1999000150 申请日期 1999.12.29
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