| 摘要 |
PURPOSE:To obtain a stable output signal in a short time by locking a phase comparator to switch one reference signal to another reference signal, resetting and starting a frequency divider synchronously with the reference signal so as to output an output signal synchronously with the selected reference signal from a voltage controlled oscillator. CONSTITUTION:When one of inputted at least two reference signals S1, S2 is switched from one to the other and a changeover control circuit 9 receives a switching signal of a changeover key 10, the circuit 9 opens a phase comparator input switch circuit 3 to lock the phase comparator 5. A reference signal changeover switch 2 switches one reference signal into the other reference signal and closes the phase comparator input switch circuit 3, a frequency divider 4 is reset and started synchronously with the switched reference signal S1(S2) and the output synchronously with the switched reference signal is outputted from a voltage controlled oscillator 8. Thus, a stable clock is obtained in a short time. |
