| 摘要 |
PURPOSE: An analog-digital converter is provided to prevent an erroneous operation due to excessive change of a reference signal in a comparator by exactly controlling the change width of the reference signal inputted to the comparator. CONSTITUTION: An analog-digital converter includes a successive approximate register(SAR) block(1) for outputting n bit digital signals to two digital-analog converter(5,6). The n bit digital signal outputted from the SAR block(1) have an initial value the most significant bit of which is 1 and the least significant bit of which is 0. An output signal of the digital-analog converter(5) is inputted to a comparator(3). This input operation is controlled by a switch(SW_A) that is turned on/off by a clock signal(CLK1). Also, an output signal of the digital-analog converter(6) is inputted to an input terminal of the comparator(3). This input operation is controlled by a switch(SW_B) that is turned on/off by another clock signal(CLK2). These two clock signal(CLK1,CLK2) has a phase difference of 90 degree. An analog signal being a compare signal is inputted to a non-invert input terminal of the comparator(3). An output signal of the comparator(3) is inputted to a NAND gate(4).
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