CLOCK PERIOD TRANSFORMING CIRCUIT

摘要

PURPOSE: A clock period transforming circuit is provided to remove a separate clock generator by increasing a reference clock period in a multiplication of 2 or producing an original reference clock period. CONSTITUTION: A flip-flop(1) inputs a clock signal. A first logic unit(2) outputs a first control signal according to an output signal of the flip-flop(1) and a clock period control signal. A second logic unit(3) outputs a second control signal according to the output signal of the flip-flop(1) and a clock signal. An output unit(5) outputs a period of the clock signal outputted through an output terminal as a clock signal having a twofold frequency of the clock signal or as a clock signal having the same period as the clock signal according to the output signals of the first and second logic units(2,3) and the clock period control signal.