发明名称 PHASE LOCKED LOOP CIRCUIT OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A phase locked loop circuit of a semiconductor device is provided to improve lock time and noise characteristics by varying a resistance value of a loop filter in a reciprocal relation to a current amount which is adjusted through a charge pump according to a phase difference. CONSTITUTION: A phase locked loop circuit of a semiconductor device comprises a phase detector(100) which detects a difference between a reference signal(Vref) having a predetermined frequency and a divided signal(Vdiv) from a divider(600) and generates up and down signals(UP,DOWN) as a detection result. A charge pump(200) charges and discharges a loop filter(300) according to the up and down signals(UP,DOWN) and control signals(CON1,CON2,CON3) from a control circuit(400). The loop filter(300) has a pair of capacitors and a variable resistor. The variable resistor of the loop filter(300) is varied according to according to the control signal(CON3) so as to adjust a band width of an output signal(Vfout) from a voltage controlled oscillator(500). The control circuit(400) generates the control signals(CON1,CON2,CON3) in response to the up and down signals(UP,DOWN).
申请公布号 KR20000041072(A) 申请公布日期 2000.07.15
申请号 KR19980056848 申请日期 1998.12.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 AHN, TAE WON
分类号 H03L7/00;(IPC1-7):H03L7/00 主分类号 H03L7/00
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