| 摘要 |
PURPOSE: A switched current memory cell is provided to be accurately operated without generating error current by the offset of the error current generated in accordance with double switching of a dummy cell. CONSTITUTION: The switched current memory cell(1) comprises a dummy cell(2), which shares an output terminal with the switched current memory cell and switched in accordance with a control signal input to the memory cell to shift the phase of error current. Signals generated by shifting the output of the dummy cell(2) without input current are added to the output current of the memory cell(1). The dummy cell(2) consists of a PMOS transistor(PM2), a switch(S7), an NMOS transistor(NM2) and a phase shifter(3). The phase shifter(3) shifts the phase of contact current of the PMOS transistor(PM2) and NMOS transistor(NM2) to output the shifted current to the output terminal of the memory cell(1) through a switch(S9) controlled by a control signal.
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