发明名称 METHOD FOR FORMING MULTILAYER METAL WIRING OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A multilayer metal wiring forming method of a semiconductor device is to achieve a high integration and a miniaturization of a device by narrowing an interval between a lower metal wiring and an upper metal wiring. CONSTITUTION: An etch stop film(23) is formed on the substrate including the lower metal wiring, after forming a lower metal wiring(22) on a substrate(21). A first interlayer insulating film is then provided with a plurality of dual damascene patterns consisting of a trench and a via contact hole. The first interlayer insulating film is then formed on the etching stopper. After forming a barrier metal layer and a metal layer on the first interlayer insulating film including the dual damascene patterns, a plurality of upper metal wiring(290) connected to the lower metal wiring is formed through the via contact hole by performing a chemical machine polishing. The first interlayer insulating film is then removed, and an insulating film with an air gap(31) formed between the upper metal wiring is formed on the resultant material. Finally, a second interlayer insulating film(300) is formed to electrically separate the lower metal wiring and the upper metal wiring.
申请公布号 KR20000043902(A) 申请公布日期 2000.07.15
申请号 KR19980060340 申请日期 1998.12.29
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 JANG, SEONG GEUN;LEE, SANG HUI
分类号 H01L21/768;H01L21/28;(IPC1-7):H01L21/768 主分类号 H01L21/768
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