发明名称 TIMING SIGNAL GENERATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a timing signal generating circuit that generates a high speed timing signal with high accuracy, and has a wide operating frequency range with a simple configuration and also generates the timing signal of small jitter. SOLUTION: The timing signal generating circuit is provided with a 1st timing signal generating means 1 that receives a clock CKr and generates a 1st timing signal CKs by providing a delay effectively variable to the clock CKr, a phase control means 2 that controls a phase of a 1st timing signal CKA from the 1st timing signal generating means 1, and a 2nd timing signal generating means 3 that frequency-divides the 1st timing signal CKA to produce a 2nd timing signal CKin with a frequency being one over an integer of the frequency of the 1st timing signal CKA.
申请公布号 JP2000196418(A) 申请公布日期 2000.07.14
申请号 JP19980369789 申请日期 1998.12.25
申请人 FUJITSU LTD 发明人 TAMURA YASUTAKA;GOTO KOTARO
分类号 G06F1/08;G11C11/407;H03K5/00;H03L7/00 主分类号 G06F1/08
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