发明名称 COMPARATOR AND CONTROL METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a high-speed power saving device by opening/closing a gap between the respective gates of other two transistors, which respectively connect sources and drains to the sources and drains of two transistors forming the differential pair of differential amplifiers and a power source, and temporarily increasing the currents of differential amplifiers just for a prescribed period in which a control signal is changed from first level to second level. SOLUTION: When a reset signal RESET is LOW level, P channel FET MSW1 and 2, N channel FET MSW5 and 6 and a switching element ASW1 are turned on and MSW3, 4 and 7 and ASW2 are turned off. Then, the gate of M1 and an input terminal IN are short-circuitted and the gates of M1A and M2A are turned into GND level and turned off. Output terminals OUT and OUTB become the output terminals of differential amplifiers composed of a constant current power source I1, FET M1-4 and FET MSW 1 and 2, and voltages Vout and Voutb corresponding to a potential difference between the gates of M1 and M2 are outputted.
申请公布号 JP2000196420(A) 申请公布日期 2000.07.14
申请号 JP19980366905 申请日期 1998.12.24
申请人 NEC CORP 发明人 ADACHI MASAHIRO
分类号 H03M1/34;H03K5/08;(IPC1-7):H03K5/08 主分类号 H03M1/34
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