发明名称 |
Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer |
摘要 |
An apparatus and method for integrating a submicron CMOS device and a non-volatile memory, wherein a thermal oxide layer is formed over a semiconductor substrate and a two layered polysilicon non-volatile memory device formed thereon. A portion of the thermal oxide is removed by etching, a thin gate oxide and a third layer of polysilicon having a submicron depth is deposited onto the etched region. The layer of polysilicon is used as the gate for the submicron CMOS device. In so doing a submicron CMOS device may be formed without subjecting the device to the significant re-oxidation required in formation processes for dual poly non-volatile memory devices such as EPROMs and EEPROMs, and separate device optimization is achieved.
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申请公布号 |
USRE36777(E) |
申请公布日期 |
2000.07.11 |
申请号 |
US19980167919 |
申请日期 |
1998.10.07 |
申请人 |
ATMEL CORPORATION |
发明人 |
LARSEN, BRADLEY J.;RANDAZZO, TODD A.;ERICKSON, DONALD A. |
分类号 |
H01L21/8247;H01L27/105;H01L27/115;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):H01L29/34 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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