Method and apparatus for translating an effective address to a real address within a cache memory

摘要

A method and apparatus for translating an effective address to a real address within a cache memory are disclosed. As disclosed, a content-addressable memory contains a multiple of addresses, and each of these addresses is individually associated with a unique tag. The content-addressable memory also includes an input circuit, a logic circuit, and an output circuit. The input circuit is for receiving a first number and a second number that are utilized to access the content-addressable memory. The logic is circuit is for determining whether or not there is a match between one of the tags and the two numbers, in accordance with a mismatch expression. The output circuit is for generating an address associated with a tag which matches the two numbers, in accordance with the mismatch expression.