SYNCHRONOUS AND ASYNCHRONOUS BUFFER CONTROL DEVICE ADAPTED TO UTOPIA INTERFACE

摘要

PURPOSE: A synchronous and asynchronous buffer control device adapted to a utopia interface is provided to simplify a structure of a circuit by generating a control signal necessary for an asynchronous FIFO. CONSTITUTION: A synchronous and asynchronous buffer control device adapted to a utopia interface comprises a write clock conversion portion and a read clock conversion portion. The write clock conversion portion outputs a write enable signal necessary for an asynchronous buffer by combining a write clock of a constant period provided to a synchronous buffer and a write enable signal for recording ATM cells to the synchronous buffer. The read clock conversion portion outputs a read enable signal necessary for the asynchronous buffer by combining a read clock of a constant period provided to the synchronous buffer and a read enable signal for reading the ATM cells recorded to the synchronous buffer.