发明名称 VOLTAGE LEVEL SHIFT CIRCUIT
摘要 PURPOSE: A voltage level shift circuit is provided for simultaneously outputting a low and high voltage levels. CONSTITUTION: In a voltage level shift circuit, an inverter(INV21) inverts an input low voltage signal. An NMOS transistor(MN30) includes a gate for receiving the input low voltage signal inverted by the inverter(INV21), a source connected to a ground, a drain connected to a node B, and a substrate is connected to a ground. An NMOS transistor(MN31) includes a gate connected to a node B, a source connected to a ground, a gate connected to the node B, and a substrate is connected to a ground. An NMOS transistor(MN32) includes a gate connected to a node D, a source connected to a node B, a drain connected to the node D, and a substrate is connected to a node B. An NMOS transistor(MN20) includes a gate for receiving an input low voltage signal, a source connected to a ground, a drain connected to the node A, and a substrate is connected to a ground. An NMOS transistor(MN21) includes a gate connected to a node A, a source connected to the ground, a drain connected to the node A, and a substrate is connected to a ground. An NMOS transistor(MN22) includes a gate connected to a node C, a source connected to a node A, a drain connected to the node D, and a substrate is connected to a node A. A PMOS transistor(MP32) includes a gate and drain connected to a node D, a source connected to a node E, a and a substrate is connected to a node E. A PMOS transistor(MP31) includes a source and drain for receiving a high voltage source. A PMOS transistor(MP30) includes a gate and drain connected to a node E, a source and substrate for receiving a high voltage source. A PMOS transistor(MP22) includes a gate and drain connected to a node C, a source and substrate connected to a node F. A PMOS transistor(MP21) includes a drain connected to a node F, a source and substrate for receiving a high voltage source. A PMOS transistor(MP20) includes a gate and drain connected to a node F, a source and substrate for receiving a high voltage source.
申请公布号 KR20000039156(A) 申请公布日期 2000.07.05
申请号 KR19980054402 申请日期 1998.12.11
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 YANG, JIN MO;CHOI, JEONG AE
分类号 H03K5/00;(IPC1-7):H03K5/00 主分类号 H03K5/00
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