| 摘要 |
PROBLEM TO BE SOLVED: To shorten the time from the end of the refresh of a DMA and an RAM connected to the same data bus up to the acquisition of the data of an ROM which is previously accessed and an IC card. SOLUTION: In this data reading and writing system, a try-state data latch LS373 is inserted between first and second data buses DB1 and DB2, and when a request for local bus Read access to an ROM 104 connected with the second bus DB2 is issued during the DMA control of an RAM 106 connected with the first bus DB1 or the RAM refresh, enable signals CS and OE to the latch LS373 are turned off while Address, /CS, and/OE corresponding to the request are outputted, and the Read data are held in the latch LS373. At the time of ending the DMA control or the RAM refresh, the enable signal OE of the latch LS373 is turned on so that the data of the ROM 104 held in the latch LS373 can be immediately obtained.
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