发明名称 Leading one prediction unit for normalizing close path subtraction results within a floating point arithmetic unit
摘要 An optimized multimedia execution unit configured to perform vectored floating point and integer instructions. In one embodiment, the execution unit includes an add/subtract pipeline having far and close data paths. The far data path is configured to handle effective addition operations, as well as effective subtraction operations for operands having an absolute exponent difference greater than one. The close data path, conversely, is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The execution unit may also include a plurality of add/subtract pipelines, allowing vectored add, subtract, and integer/floating point conversion instructions to be performed. The execution unit may also be expanded to handle additional arithmetic instructions (such as reverse subtract and accumulate functions) by appropriate input multiplexing. The execution unit may also be configured with a leading one prediction unit that is configured to predict the position of a leading one value for certain results in order to improve normalization times.
申请公布号 US6085208(A) 申请公布日期 2000.07.04
申请号 US19980049758 申请日期 1998.03.27
申请人 ADVANCED MICRO DEVICES, INC. 发明人 OBERMAN, STUART F.;ROBERTS, MARK
分类号 G06F7/57;G06F9/30;G06F9/302;G06F9/318;G06F9/38;H03M7/24;(IPC1-7):G06F5/00 主分类号 G06F7/57
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