| 摘要 |
A digital signal processing device includes a rectifier circuit, logarithm conversion circuit, peak-hold/timewise attenuation circuit, gain table, multiplier and timing generation circuit. The rectifier circuit obtains the absolute value of input data. The logarithm conversion circuit converts the linear input data into logarithmic data. The peak-hold/timewise attenuation circuit performs peak-hold and timewise attenuation processes on the instantaneous logarithmic data, to obtain an approximate logarithmic envelope. The gain table which has nonlinear gain characteristic receives the logarithmic data as a readout address, to thereby output a gain value corresponding to the input level. The multiplier multiplies the input data by the gain value so as to provide output data that have been processed in accordance with the nonlinear characteristic.
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