SEMICONDUCTOR MEMORY DEVICE CONTAINING DIFFERENT SIZED SUBSIDIARY ARRAYS AND METHOD FOR REDUCING NUMBER OF SUBSIDIARY ARRAYS

摘要

PURPOSE: A semiconductor memory device is provided to reduce the number of sense amplifiers while improving chip efficiency. CONSTITUTION: 2¬M+2¬M/2 memory cells are connected to each bit line of subsidiary arrays(109,110,112.114). 2¬M memory cells are connected to the bit lines of subsidiary arrays(111,114). Therefore, the subsidiary arrays are composed in different sizes. In the subsidiary array structure, the number of sense amplifier areas is reduced by one. In a DRAM device using a common sense amplifier scheme, four subsidiary arrays require three sense amplifier areas. If the number of subsidiary arrays is reduced from eight to six, two sense amplifier areas are reduced. Therefore, the cell array area in a chip area is increased.