发明名称 |
Static RAM circuit for defect analysis |
摘要 |
Small feature CMOS defect analysis of SRAM circuits is made less time consuming with the inclusion of an in-circuit test connection which is brought to external contact pads. External measurement and circuit forcing are accomplished via the external contact pads. A fault library for comparison to automated tests results provides faster resolution of process defects. |
申请公布号 |
US6081465(A) |
申请公布日期 |
2000.06.27 |
申请号 |
US19980070820 |
申请日期 |
1998.04.30 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
WANG, JONATHAN;VOOK, DIETRICH W. |
分类号 |
G11C11/413;G01R31/28;G06F11/25;G11C29/04;G11C29/48;G11C29/50;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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