发明名称 Interruptible state machine
摘要 An interruptible state machine includes a state machine and an interrupt processor. The interrupt processor minimizes the required total number of states for the state machine when it must return to its next "normal" state after an input or interrupt that may occur at any of its normal states. In response to the interrupt, the interrupt processor stores the next state, processes the interrupt, and restores the next state after precessing the interrupt.
申请公布号 US6081866(A) 申请公布日期 2000.06.27
申请号 US19980200373 申请日期 1998.11.24
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 GRIVNA, EDWARD L.
分类号 G06F9/46;G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F9/46
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