| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent occurrence of malfunctions, even when a noise on a GND line or power supply line with an external state change propagates to the inside. SOLUTION: While being exclusively ORed with a flip-flop(FF) 25 and being exclusively ANDed with an output permit signal 30, an output state change detecting signal 34 is inputted from another external input/output circuit 10 to a change detecting circuit 13 for more than (n) bits, together with an output state change detecting signal. The change detecting circuit 13 for more than (n) bits outputs a logic value 1. That output is delayed for one clock by an FF 14 and ORed with a first CPU clock C1 by an OR gate 15, and a second CPU clock C3 supplied to a CPU 11 and a memory 12 is fixed at the logic value 1 and is temporarily stopped. The noise is propagated to the CPU 11 and the memory 12 a somewhat later, but since the CPU 11 and the memory 12 are not operated during this period, the occurrence of malfunctions can be prevented.</p> |
