发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide an interlayer bonding process having a high reliability in the method of forming continuity holes for electric interlayer connections of a semiconductor device whereby gaps formed at bonds of the continuity holes with metal wirings adjacent the continuity holes, filling defects and corrosion factors are removed. SOLUTION: Openings connected to a lower layer are formed in an insulation film 1 of a semiconductor substrate, a barrier metal layer 2 is formed, this layer 2 is tapered at the top edges A of opening structures, tungsten 3 is filled in the opening structures and etched to form tungsten plugs at a high selectivity to tungsten, with leaving the barrier metal layer, a coating film (resist) 4 covers the tungsten plugs, the barrier metal layer on the insulation film 1 is removed by etching at a high selectivity to the barrier metal layer to form metal contact holes, and an Al wiring 6 is formed over the metal contact holes.
申请公布号 JP2000174124(A) 申请公布日期 2000.06.23
申请号 JP19980350131 申请日期 1998.12.09
申请人 NEC CORP 发明人 HOSHINO AKIRA
分类号 H01L21/768;H01L21/28;(IPC1-7):H01L21/768 主分类号 H01L21/768
代理机构 代理人
主权项
地址
您可能感兴趣的专利