Computational structure having multiple stages wherein each stage includes a pair of adders and a multiplexing circuit capable of operating in parallel

摘要

A modular computational structure includes a pipeline having first and second adder stages. Each adder stage includes a pair of adders which operate in parallel, and outputs ports of the first adder stage are coupled to input ports of the second adder stage. Rounding logic and an accumulator are included in the second stage. By varying the inputs to the first and second stages a variety of complex arithmetic functions suitable for video encoding can be implemented. Examples of the operations include completion of multiply and multiply-and-accumulate operations, averages of two values, averages of four values, and merged difference and absolute value calculation.