发明名称 TIMING SPEC VERIFYING METHOD
摘要 PROBLEM TO BE SOLVED: To verify a skew spec concerning a macro having the skew spec by performing the verification of timing based on the skew spec registered on a library data base concerning the macro owning the skew spec. SOLUTION: Concerning the macro having the skew spec of a design circuit including circuit elements to asynchronously operate, the value of the skew spec is previously registered on a macro library definition file, in the case of timing verification, and the skew spec value registered on that macro library is read out and utilized for verifying the skew spec. In this case, the design circuit to receive the skew spec verification is composed of an asynchronous memory 2, address generating circuit 1 and flip-flop FF3 for holding the output of the asynchronous memory 2. The address generating circuit 1 generates the write and read addresses of an asynchronous RAM.
申请公布号 JP2000163454(A) 申请公布日期 2000.06.16
申请号 JP19980334085 申请日期 1998.11.25
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 MOTOOKA TOSHIMI
分类号 G01R31/28;G06F17/50;(IPC1-7):G06F17/50 主分类号 G01R31/28
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