发明名称 COMPUTER SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide an address allocation for relaxing the performance reduction of a main storage device caused by a stride access even when an existing memory module is replaced with the memory module of a different bank configuration. SOLUTION: In the computer system, a mutual coupling network 20 is provided with an address mapping circuit 40, respective memory modules 50 composing of a main storage device 30 are provided with address mapping circuits 60, and an address translation for main memory skew is performed over two stages. The address translation to be performed by the address mapping circuit becomes a system suitable for the bank configuration in the memory module 50.
申请公布号 JP2000163316(A) 申请公布日期 2000.06.16
申请号 JP19980336858 申请日期 1998.11.27
申请人 HITACHI LTD 发明人 AOKI HIDEKI;ITO MASANAO;TAMAOKI YOSHIKO;FUJII KEIMEI
分类号 G06F12/06;G06F15/167;(IPC1-7):G06F12/06 主分类号 G06F12/06
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