发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD FOR DESIGNING THE SAME, AND RECORD MEDIUM
摘要 PROBLEM TO BE SOLVED: To form a method for designing a semiconductor integrated circuit device capable of contriving to make high integration, and a record medium of layout data by a method wherein it is constituted by a control macro containing a trimming circuit and a plurality of memory units. SOLUTION: A system LSI 51 shares a trimming circuit 21 and a reference voltage generating circuit 22 not depending upon a magnitude of memory capacity of units 52 to 54 in voltage dropping circuits 52a to 54a of respective memory units 52 to 54, and similarly shares a trimming circuit 25 and a detection circuit 26 in substrate potential generating circuits 52b to 54b. The respective circuits 21, 22, 25, 26 are disposed in a separate control macro 55 from the respective memory units 52 to 54. Accordingly, measurement of a reference voltage Vr outputted from the reference voltage generating circuit 22 and a trimming process, and measurement of levels of a detection signal SG outputted from the detection circuit 26 and a trimming process have only to be conducted only for the single control macro 55, and are not required every memory units. Therefore, it is possible to shorten a test period of time at the time of shipping the system LSI 51.
申请公布号 JP2000164811(A) 申请公布日期 2000.06.16
申请号 JP19980335616 申请日期 1998.11.26
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 OGAWA KAZUKI;ITO EISAKU;ISHIDA YOSHIYUKI
分类号 H01L21/822;G11C5/14;G11C11/34;G11C11/401;G11C11/407;G11C29/02;H01L21/82;H01L27/04;H01L27/10;(IPC1-7):H01L27/04;G11C29/00 主分类号 H01L21/822
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