发明名称 APPARATUS FOR INSPECTING DISCONNECTION OF CHIP-SIZE PACKAGE SUBSTRATE AND ITS MANUFACTURE
摘要 PROBLEM TO BE SOLVED: To provide an apparatus for inspecting a disconnection of a chip size package substrate for which a jig for carrying out a connection test to the chip-size package or the like having wire bonding pads arranged with a fine pitch can be constituted inexpensively. SOLUTION: A wire bonding pad 101c is totally shortcircuited by a jig 2 (projecting plate molded of a copper foil), having a copper foil projecting part 2a formed to a solder resist open part 101e of a chip-size package substrate, by etching a copper foil and an anisotropic pressurized conductive rubber 3, whereby a disconnection point is detected.
申请公布号 JP2000162260(A) 申请公布日期 2000.06.16
申请号 JP19980341698 申请日期 1998.12.01
申请人 SONY CORP 发明人 UEHARA MINORU;MARUO SEIGO
分类号 G01R31/02;H01L21/66;(IPC1-7):G01R31/02 主分类号 G01R31/02
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