发明名称 POWER-ON CIRCUIT BUILT-IN IC
摘要 <p>PROBLEM TO BE SOLVED: To ensure a high impedance state at a terminal of an IC until an operation start of the IC just after application of a power supply voltage. SOLUTION: This power-on circuit is a circuit built in a synchronous IC memory and provided with a ring counter 10, an output control circuit 52, and a pulse signal interruption circuit 12 or the like. The ring counter 10 continuously generates a pulse signal P when a power supply voltage Vdd is applied to the synchronous IC memory. While the output control circuit 52 received the pulse signal P generated by the ring counter 10, an output terminal DQ of the synchronous IC memory is set to a high impedance. When a pulse signal interruption circuit 12 receives a clock signal CLK, the circuit 12 interrupts the input of the pulse signal P to the output control circuit 52.</p>
申请公布号 JP2000165219(A) 申请公布日期 2000.06.16
申请号 JP19980340053 申请日期 1998.11.30
申请人 NEC CORP 发明人 HARA KOJI
分类号 G11C11/41;G11C11/401;G11C11/407;G11C11/409;G11C11/417;G11C16/06;H03K17/22;H03K17/687;H03K19/094;(IPC1-7):H03K17/22 主分类号 G11C11/41
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