SYNCHRONOUS SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a clock-regenerating circuit generating an internal clock signal which is stably synchronized in phase with an external clock or reference clock signal, even if operation environment changes. SOLUTION: This device is provided with a frequency-determining circuit 83 which generates a clock signal roughly synchronized in phase with the external clock signal and a fine adjusting circuit 85 generating an internal synchronizing signal which is precisely synchronized in phase with the external clock signal. This fine adjusting circuit 85 is equipped with a function of adjusting the phase of the frequency determining circuit 83, when phase synchronization is carried out beyond its adjustment range. The frequency determining circuit 83 and fine adjusting circuit 85 receive a clock source voltage Vccc, and other buffer circuits receive a peripheral source voltage Vccp.